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The NTE74LS379 is a hex monolithic positive-edge-triggered flip-flop in a 16-lead plastic DIP-type package that utilizes TTL circuitry to implement D-type flip-flop logic with an enable input. The NTE74LS379 is similar to the NTE74LS175 but features a common enable instead of a common clear. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuit is designed to prevent false clocking by transitions at the G input. The flip-flops are guaranteed to respond to clock frequencies ranging from 0 to 30MHz while maximum clock frequency is typically 40MHz. Typical power dissipation is 10mW per flip-flop.
Unless otherwise specified, all voltages are referenced to GND
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