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NTE74165 IC TTL Shift Register

Model:

NTE74165

 | Catalog #: 55051325
Sale Price:
$2.19
You save:
$0.11 (4.8%)
 
Valid until: 07/17/14
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  • Absolute maximum ratings:
  • Supply voltage VCC: 7V
  • DC Input voltage VIN: 5.5V
  • Power dissipation PD: 21mW
  • Operating temperature range TA: 0°C to +70°C
  • Storage temperature range Tstg: −65°C to +150°C
  • Unless otherwise specified, all voltages are referenced to GND

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  • Absolute maximum ratings:
  • Supply voltage VCC: 7V
  • DC Input voltage VIN: 5.5V
  • Interemitter voltage (Note 2): 5.5V
  • Power dissipation PD: 305mW
  • Operating temperature range TA: 0°C to +70°C
  • Storage temperature range Tstg: −65°C to +150°C

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  • Absolute maximum ratings:
  • Supply voltage VCC: 7V
  • DC Input voltage VIN: 5.5V
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  • Power dissipation PD: 305mW
  • Operating temperature range TA: 0°C to +70°C
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  • Absolute maximum ratings:
  • Supply voltage VCC: 7V
  • DC Input voltage VIN: 5.5V
  • Interemitter voltage (Note 2): 5.5V
  • Power dissipation PD: 305mW
  • Operating temperature range TA: 0°C to +70°C
  • Storage temperature range Tstg: −65°C to +150°C

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  • Absolute maximum ratings:
  • Supply voltage VCC: 7V
  • DC Input voltage VIN: 5.5V
  • Interemitter voltage (Note 2): 5.5V
  • Power dissipation PD: 305mW
  • Operating temperature range TA: 0°C to +70°C
  • Storage temperature range Tstg: −65°C to +150°C

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  • Synchronous load
  • Direct overriding clear
  • Parallel−to−serial conversion

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Product Summary

The NTE74165 is an 8-bit serial shift register in a 16-lead plastic DIP-type package that shifts the data in the direction of Q A toward Q H when clocked. Parallel-in access to each stage is made available by eight individual direct data inputs that are enabled by a low level at the shift/load input. This register also features gated clock inputs and complementary outputs from the eighth bit. All inputs are diode clamped to minimize transmission-line effects, thereby simplifying system design. Clocking is accomplished through a 2-input positive-NOR gate, permitting one input to be used as a clock inhibit function. Holding either of the clock inputs high inhibits clocking and holding either clock input low with the shift/load input high enables the other clock input. The clock inhibit input should be changed to the high level only while the clock input is high. Parallel loading is inhibited as long as the shift/load input is high. Data at the parallel inputs are loaded directly into the register while the shift/load input is low independently of the levels of the clock, clock inhibit or serial inputs.

Data Sheet

Features:

  • Complementary outputs
  • Direct overriding load (data) inputs
  • Gated clock inputs
  • Parallel-to-serial data conversion
    • Absolute maximum ratings:
    • Supply voltage VCC: 7V
    • DC Input voltage VIN: 5.5V
    • Interemitter voltage (Note 2): 5.5V
    • Power dissipation PD: 210mW
    • Operating temperature range TA: 0°C to +70°C
    • Storage temperature range Tstg: −65°C to +150°C
    Pricing and availability: Please note that all prices are subject to change without prior notice. Prices advertised on this site are for online orders only. Prices on some items may differ from those advertised in RadioShack stores. All merchandise may not be available at all stores, and all stores may not participate in all sales promotions. We recommend you contact the store to confirm product availability and price.

    Disclaimer: Note 1. Unless otherwise specified, all voltages are referenced to GND. Note 2. This is the voltage between two emitters of a multiple−emitter transistor. This rating applies to the shift/load input in conjunction with the clock−inhibit inputs.

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