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The NTE74LS221 is a monolithic dual multivibrator in a 16−Lead plastic DIP-type package with performance characteristics virtually identical to those of the NTE74121. Each multivibrator features a
negative−transition−triggered input and a positive−transition−triggered input either of which can be used as an inhibit input. Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt−trigger input circuitry (TTL hysteresis) for B input allows jitter−free triggering from inputs with transition rates as slow as one volt/second, providing the circuit with excellent noise
immunity of typically 1.2 volts. A high immunity to VCC noise of typically 1.5V is also provided by internal latching circuitry.
Once fired, the outputs are independent to further transitions of the A and B inputs and are a function of the timing components, or the output pulses can be terminated by the overriding clear. Input pulses may be of any duration relative to the output pulse. Output pulse length may be varied from 35ns to the maximum pulse length of 70 seconds by choosing appropriate timing components. With Rext = 2kΩ output pulse and Cext = 0, an output pulse of typically 30ns is achieved which may be used as a DC triggered reset signal. Output rise and fall times are TTL compatible and independent of pulse length. Pulse width stability is achieved through internal compensation and is virtually independent of VCC and temperature. In most applications, pulse stability will only be limited by the accuracy of external timing components. Jitter−free operation is maintained over the full temperature and VCC ranges for more than six decades of timing capacitance (10pF to 10°F) and more than one decade of timing resistance (2kΩ to 100kΩ).Throughout these ranges, pulse width is defined by the relationship: tw(out) = CextRext In2 0.7
CextRext. In circuits where the pulse cutoff is not critical, timing capacitance up to 1000°F and timing resistance as low as 1.4kΩ may be used. Also, the range of jitter−free output pulse widths is extended if VCC is held to 5V and free−air temperature is +25°C. Duty cycles as high as 90% are achieved when using maximum recommended RT. Higher duty cycles are available if a certain amount of pulse−width jitter is allowed.
Overriding clear terminates output pulse
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