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The NTE74LS193 is a synchronous 4−bit binary reversible up/down counter in a 16−lead plastic DIP-type package having the complexity of 55 equivalent gates. Synchronous operation is provided by having all flip−flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four master−slave flip−flops are triggered by a low−to−high transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other count input is high. This counter is fully programmable; that is, each output may be preset to either level by entering the desired data of the data inputs while the load input is low. The output will change to agree with the data inputs independently of the count pulses. This feature allows the counter to be used as a modulo−N divider by simply modifying the count length with the preset inputs. A clear input has been provided which forces all outputs to the low level when a high level is applied. The clear function is independent of the count and load inputs. The clear, count and load inputs are buffered to lower the drive requirements. This reduces the number of clock drivers, etc., required for long words. This device was designed to be cascaded without the need for external circuitry. Both borrow and carry outputs are available to cascade both the up−counting and down−counting functions. The borrow output produces a pulse equal in width to the count−up input when an overflow condition exists. The counter can then be easily cascaded by feeding the borrow and carry outputs to the countdown and count−up inputs respectively of the succeeding counter.
Cascading circuitry provided internally
Individual preset to each flip−flop
Fully independent clear input
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