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NTE74HC573 High-Speed CMOS Octal D−Type Latch

Model:

NTE74HC573

 | Catalog #: 55051013
Price:
$1.84
$1.84
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  • Wide power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Onboard oscillator
  • Common reset
  • Negative−edge clocking
  • Fanout (over temp range):
    Std outputs: 10 LS−TTL loads
    Bus driver outputs: 15 LS−TTL loads
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LS−TTL logic ICs
  • Absolute maximum ratings:*
    VCC: −0.5 to +7.0V
  • IIK, IOK: &plusnm;20mA
  • IOUT: &plusnm;25mA
  • ICC: &plusnm;50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 67°C/W
  • TL: +300°C

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  • Wide power supply range: 2V to 6V
  • Switch voltage: 0V to 10V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Wide analog input voltage range: &plusnm;5V Max
  • Low "ON" Resistance:
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  • Wide power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Fully static operation
  • Buffered inputs
  • Common reset
  • Negative edge clocking
  • Fanout (over temp. range):
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    VCC: −0.5 to +7.0V
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  • DC output source or sink current (per output), IOUT: &plusnm;25mA
  • DC VCC or GND current (per pin), ICC: &plusnm;50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 67°C/W
  • TL: +300°C

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  • Wide power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Fully static operation
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  • Absolute maximum ratings:*
    VCC: −0.5 to +7.0V
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  • DC output source or sink current (per output), IOUT: &plusnm;25mA
  • DC VCC or GND current (per pin), ICC: &plusnm;50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 67°C/W
  • TL: +300°C

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  • Wide power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Independent asynchronous inputs and outputs
  • Expandable in either direction
  • Reset capability
  • Status indicators on inputs and outputs
  • 3−state outputs
  • Shift−out independent of 3−state control
  • Fanout (over temp R): Std outputs: 10 LS−TTL loads Bus driver outputs: 15 LS−TTL loads
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LS−TTL logic ICs
  • Applications:
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    Line printer input buffers
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  • Absolute maximum ratings:*
    VCC: −0.5 to +7.0V
  • IIK, IOK: &plusnm;20mA
  • DC output source or sink current (per output), IOUT: &plusnm;25mA
  • DC VCC or GND current (per pin), ICC: &plusnm;50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 67°C/W
  • TL: +300° C

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0

  • Wide power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Fully static operation
  • Buffered inputs
  • Common reset
  • Negative−edge clocking
  • Fanout (over temp R):
    Std outputs: 10 LS−TTL loads
    Bus driver outputs: 15 LS−TTL loads
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LS−TTL logic ICs
  • Absolute maximum ratings:*VCC: −0.5 to +7.0V
  • IIK, IOK: &plusnm;20mA
  • DC output source or sink current (per output), IOUT: &plusnm;25mA
  • DC VCC or GND current (per pin), ICC: &plusnm;50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 80°C/W
  • TL: +300°C

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Availability:

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Product Summary

The NTE74HC573 is a high-speed octal transparent D−type latch with 3−state outputs in a 20−Lead DIP-type package with the capability to drive 15 LS−TTL loads. When the latch−enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output−enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high−impedance state. In the high−impedance state, the outputs neither load nor drive the bus lines significantly. The high−impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high−impedance state. To ensure the high−impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current−sinking capability of the driver.

  • Wide power supply range: 2V to 6V
  • 3−state outputs directly drive bus lines
  • Balanced propagation delays and transition times
  • Bus driver outputs drive up to 15 LS−TTL loads
  • Significant power reduction compared to LS−TTL logic ICs
  • Absolute maximum ratings:
    VCC: −0.5 to +7.0V
  • IIK, IOK: &plusnm;20mA
  • DC drain current (per output), IOUT: &plusnm;35mA
  • DC output source or sink current (per output), IOUT: &plusnm;25mA
  • ICC: &plusnm;50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 69°C/W
  • TL: +300°C
Pricing and availability: Please note that all prices are subject to change without prior notice. Prices advertised on this site are for online orders only. Prices on some items may differ from those advertised in RadioShack stores. All merchandise may not be available at all stores, and all stores may not participate in all sales promotions. We recommend you contact the store to confirm product availability and price.

Disclaimer: * Absolute Maximum Ratings are those values beyond which damage to the device may occur. Unless otherwise specified, all voltages are referenced to GND.

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