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NTE74HC259 IC Hi-Speed CMOS Decoder

Model:

NTE74HC259

 | Catalog #: 55050999
Price:
$1.70
$1.70
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  • Wide-power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Buffered inputs
  • Typical propagation delay (in to output): 12ns at VCC = 5V, CL = 15pF, TA = +25°C
  • Fanout (over temp range): standard outputs 10 LS−TTL loads, bus driver outputs 15 LS−TTL loads
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  • Wide-power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • 3−state outputs
  • Buffered inputs
  • BUS line driving capability
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  • Typical propagation delay: 8ns
  • Wide-power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • 3−state outputs
  • Buffered inputs
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  • Absolute maximum ratings:*
    VCC: −0.5 to +7.0V
  • IIK, IOK: &plusnm;20mA
  • Per output IOUT: &plusnm;35mA
  • Sink current per output: &plusnm;25mA
  • ICC: &plusnm;70mA
  • Tj: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 69°C/W
  • TL: +300°C

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  • IOUT: &plusnm;25mA
  • ICC: &plusnm;50mA
  • PD: 600mW
  • Tstg: 600mW
  • TL: +260°C

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  • Absolute maximum ratings:*
    VCC: −0.5 to +7.0V
  • VIN: −1.5 to VCC +1.5V
  • VOUT: −0.5 to VCC + 0.5V
  • IIK, IOK: &plusnm;20mA
  • IOUT: &plusnm;25mA
  • Per-pin ICC: &plusnm;50mA
  • PD: 600mW
  • Tstg: −65°C to +150°C
  • TL: +260°C

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   Free Ground Shipping on orders over $25.  More details

Availability:

ONLINE In stock
Usually ships in 1 - 2 business days


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Product Summary

The NTE74HC259 is an 8−bit addressable latch in a 16−lead DIP-type package that features the low−power consumption associated with CMOS circuitry and has speeds comparable to low−power Schottky. This latches three active modes and one reset mode. When both the Latch Enable (LE) and Master Reset (MR) inputs are low (8−line demultiplexer mode) the output of the addressed latch follows the data input and all other outputs are forced low. When both MR and LE are high (memory mode), all outputs are isolated from the data input, i.e. all latches hold the last data presented before the LE transition from low to high. A condition of LE low and MR high (addressable latch mode) allows the addressed latch's output to follow the data input, all other latches are unaffected. The reset mode (all outputs low) results when LE is high and MR is low.

  • Wide-power supply range: 2V to 6V
  • High-noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Buffered inputs and outputs
  • Four operating modes
  • Typical propagation delay: 15ns at VCC = 5V, CL = 15pF, TA = +25°C
  • Fanout (over temp range): standard outputs 10 LS−TTL loads, bus driver outputs 15 LS−TTL loads
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LS−TTL logic ICs
Pricing and availability: Please note that all prices are subject to change without prior notice. Prices advertised on this site are for online orders only. Prices on some items may differ from those advertised in RadioShack stores. All merchandise may not be available at all stores, and all stores may not participate in all sales promotions. We recommend you contact the store to confirm product availability and price.

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