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The NTE74HCT74 is an octal D−type flip−flop in a 14−Lead DIP-type package that uses advanced silicon−gate CMOS technology to achieve operation speeds similar to the equivalent LS−TTL part. It possesses the high-noise immunity and low-power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS−TTL loads.
This flip−flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive−going transition of the
clock pulse. Preset and clear are independent of the clock and accomplished by a low level at the appropriate input. The NTE74HCT logic family is functionally and pin−out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and GND. NTE74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These devices are also plug−in replacements to LS−TTL devices and can be used to reduce power consumption in existing designs.
Typical propagation delay: 20ns
Low quiescent current: 40μA (max)
Low input current: 1μA (max)
Fanout of 10 LS−TTL loads
Absolute Maximum Ratings:* Supply voltage, VCC: −0.5 to +7.0V
VIN: −1.5 to VCC +1.5V
VOUT: −0.5 to VCC + 0.5V
IIK, IOK: ±20mA
Per pin, IOUT: ±25mA
Per pin, ICC: ±50mA
Tstg: −65° to +150°C
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* Absolute Maximum Ratings are those values beyond which damage to the device may occur. Unless otherwise specified, all voltages are referenced to GND. Power Dissipation temperature derating: 12mW/°C from +65°C to +85°C.