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The NTE NTE74C107 dual J−K flip−flop is a monolithic complementary MOS (CMOS) IC constructed with N− and P−channel enhancement transistors. Each flip−flop has independent J, K, clock and clear inputs and Q and Q outputs. The NTE74C76 flip−flop also includes preset inputs and is supplied in a 16−Lead DIP-type package. It is edge sensitive to the clock input and change state on the negative going transition of the clock pulses. Clear or preset is independent of the clock and is accomplished by a low level on the respective input.
Supply voltage range: 3V to 15V
Tenth power TTL compatible: drive 2 LPTTL loads
High-noise immunity: 0.45 VCC (Typ)
Low-power consumption: 50nW (Typ)
Medium-speed operation: 10Mhz (Typ) with 10V supply
Absolute Maximum Ratings:*
Voltage at any pin:** −0.3V to VCC +0.3V
Operating VCC range: 3V to 15V
Maximum VCC range: 16V
Package dissipation: 500mW
Operating temperature range: 0° to +70°C
Storage temperature range: −65° to +150°C
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* "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation. ** These devices should not be connected to circuits with the power on because high transient voltages may cause permanent damage.