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The NTE4510B (16−lead DIP) and NTE4510BT (SOIC−16) are up/down counters constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. The counter consists of type D flip−flop stages with a gating structure to provide type T flip−flop capability. The counter can be cleared by applying a high level on the Reset line. These complementary MOS counters find primary use in up/down and difference counting and frequency synthesizer applications where low-power and/or high-noise immunity is desired. They are also useful in A/D and D/A conversion for magnitude and sign generation.
VDD = −0.5 to +18.0V
Vin = −0.5 to VDD + 0.5V
I (per pin) = 10mA
TA = −55 to +125°C
Tstg = −65 to +150°C
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These devices contain circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation it is recommended that V9in9 and V9out9 be constrained to the range VSS ≤(Vin or Vout) ≤VDD. Unused inputs must always be tied to an appropriate logic level (e.g., either VSS or VDD).