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The NTE4077B (14−lead DIP) and NTE4077BT (SOIC−14) are quad exclusive NOR gates constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. These complementary MOS logic gates find primary use where low-power dissipation and/or high-noise immunity is desired.
VDD = −0.5 to +18.0V
Vin = −0.5 to VDD + 0.5V
I = 10mA
TsA = −55 to +125°C
Tstg = −65 to +150°C
TL = 260°C
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These devices contain circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation is is recommended that Vin and Vout be constrained to the range VSS ≤(Vin or Vout) ≤VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD).