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The NTE4042B (16−Lead DIP) is a quad transparent latch device constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches can be reversed using the polarity input. Information present at the data input is transferred to outputs Q and Q during the clock level which is determined by the polarity input. When the polarity input is in the logic "0" state, data is transferred during the low clock level and when the polarity input is in the logic "1" state the transfer occurs during the high-lock level.
VDD = −0.5 to +18.0V
Vin = −0.5 to VDD to +0.5V
Vout = −0.5 to VDD to +0.5V
Iin = &plusnm;10mA
Iout = &plusnm;10mA
PD = 500mW Temperature derating (from +65° to +125°C) = −7.0mW/°C
Tstg = −65° to +150°C
TL = +260°C
Above are maximum ratings - those values beyond which damage to the device may occur
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