• Model: NTE74HCT240
  • Catalog #: 55051025

NTE74HCT240 IC High-Speed CMOS Buffer

Details

$1.63

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(Online Only)

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Additional Information

  • Summary
  • Tech Specs
  • Reviews
The NTE74HCT240 (Inverting Outputs) and NTE74HCT244 (Non−Inverting Outputs) are 3−STATE buffers in a 20−Lead DIP-type package that utilize advanced silicon−gate CMOS technology and are general purpose high-speed buffers. They possess high drive current outputs which enable high-speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low-power Schottky devices, while retaining the low-power consumption of CMOS. Both devices are TTL input compatible and have a fanout of 15 LS−TTL equivalent inputs. Each device has two active low enables (1G and 2G) and each enable independently controls 4 buffers. These devices are intended to interface between TTL and NMOS components and standard CMOS devices and are also plug−in replacements for LS−TTL devices and can be used to reduce power consumption in existing designs. All inputs are protected from damage due to static discharge by diodes to VCC and GND.
  • TTL input compatible
  • Typical propagation delay: 14ns
  • 3−STATE outputs for connection to system buses
  • Low quiescent current: 80μA
  • High output drive current: 6mA (min)
  • Absolute maximum ratings:*
    Supply voltage, VCC: −0.5 to +7.0V
  • VIN: −1.5 to VCC +1.5V
  • VOUT: −0.5 to VCC + 0.5V
  • IIK, IOK: ±20mA
  • Per-pin IOUT: ±35mA
  • Per-pin: ±70mA
  • PD: 600mW
  • Tstg: −65°C to +150°C
  • TL: +260°C
* Absolute Maximum Ratings are those values beyond which damage to the device may occur. Unless otherwise specified, all voltages are referenced to GND. Power Dissipation temperature derating: 12mW/°C from +65°C to +85°C.
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Shipping

Ships in 1-2 Business Days

Presentation Attributes

Storefront Attributes

Search Refinements

Shop Runner

Battery Features

Capacity UOM

mAh

Rechargeable

No

Cleansing

Dimensions

Fulfillment

Package Height

0.50

Package Length

6.25

Package Width

3.70

General

Model

NTE74HCT240

Product Type

Registers and buffers

Identification

Manufacturer Part Number

NTE74HCT240

Surcharge

Legal

Merchandising

Inputs & Outputs

Miscellaneous Features

Operating Temperature UOM

° F

Supported Languages

English

Power Features

Docking station

No

Promo

Retail

Price

Remote Control Features

Warranty

0.00

0.00

Available RadioShack Service Plan

No

Warranty Labor UOM

days

Warranty Parts UOM

days

Root

Additional Features

Water-Resistant or Waterproofness Standard

No

Miscellaneous Features

Power Features

Print
 

Summary

The NTE74HCT240 (Inverting Outputs) and NTE74HCT244 (Non−Inverting Outputs) are 3−STATE buffers in a 20−Lead DIP-type package that utilize advanced silicon−gate CMOS technology and are general purpose high-speed buffers. They possess high drive current outputs which enable high-speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low-power Schottky devices, while retaining the low-power consumption of CMOS. Both devices are TTL input compatible and have a fanout of 15 LS−TTL equivalent inputs. Each device has two active low enables (1G and 2G) and each enable independently controls 4 buffers. These devices are intended to interface between TTL and NMOS components and standard CMOS devices and are also plug−in replacements for LS−TTL devices and can be used to reduce power consumption in existing designs. All inputs are protected from damage due to static discharge by diodes to VCC and GND.
  • TTL input compatible
  • Typical propagation delay: 14ns
  • 3−STATE outputs for connection to system buses
  • Low quiescent current: 80μA
  • High output drive current: 6mA (min)
  • Absolute maximum ratings:*
    Supply voltage, VCC: −0.5 to +7.0V
  • VIN: −1.5 to VCC +1.5V
  • VOUT: −0.5 to VCC + 0.5V
  • IIK, IOK: ±20mA
  • Per-pin IOUT: ±35mA
  • Per-pin: ±70mA
  • PD: 600mW
  • Tstg: −65°C to +150°C
  • TL: +260°C

Tech Specs

The NTE74HCT240 (Inverting Outputs) and NTE74HCT244 (Non−Inverting Outputs) are 3−STATE buffers in a 20−Lead DIP-type package that utilize advanced silicon−gate CMOS technology and are general purpose high-speed buffers. They possess high drive current outputs which enable high-speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low-power Schottky devices, while retaining the low-power consumption of CMOS. Both devices are TTL input compatible and have a fanout of 15 LS−TTL equivalent inputs. Each device has two active low enables (1G and 2G) and each enable independently controls 4 buffers. These devices are intended to interface between TTL and NMOS components and standard CMOS devices and are also plug−in replacements for LS−TTL devices and can be used to reduce power consumption in existing designs. All inputs are protected from damage due to static discharge by diodes to VCC and GND.

Reviews