• Model: NTE74HC573
  • Catalog #: 55051013

NTE74HC573 High-Speed CMOS Octal D−Type Latch

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$1.84

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(Online Only)

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Additional Information

  • Summary
  • Tech Specs
  • Reviews
The NTE74HC573 is a high-speed octal transparent D−type latch with 3−state outputs in a 20−Lead DIP-type package with the capability to drive 15 LS−TTL loads. When the latch−enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output−enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high−impedance state. In the high−impedance state, the outputs neither load nor drive the bus lines significantly. The high−impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high−impedance state. To ensure the high−impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current−sinking capability of the driver.
  • Wide power supply range: 2V to 6V
  • 3−state outputs directly drive bus lines
  • Balanced propagation delays and transition times
  • Bus driver outputs drive up to 15 LS−TTL loads
  • Significant power reduction compared to LS−TTL logic ICs
  • Absolute maximum ratings:
    VCC: −0.5 to +7.0V
  • IIK, IOK: ±20mA
  • DC drain current (per output), IOUT: ±35mA
  • DC output source or sink current (per output), IOUT: ±25mA
  • ICC: ±50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 69°C/W
  • TL: +300°C
* Absolute Maximum Ratings are those values beyond which damage to the device may occur. Unless otherwise specified, all voltages are referenced to GND.
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Ships in 1-2 Business Days

Presentation Attributes

Storefront Attributes

Search Refinements

Shop Runner

Custom Product Attributes

Battery Features

Capacity UOM

mAh

Rechargeable

No

Cleansing

Dimensions

Fulfillment

Package Height

0.50

Package Length

6.25

Package Width

3.70

General

Model

NTE74HC573

Product Type

Counters

Identification

Manufacturer Part Number

NTE74HC573

Surcharge

Legal

Merchandising

Inputs & Outputs

Miscellaneous Features

Operating Temperature UOM

° F

Supported Languages

English

Power Features

Docking station

No

Promo

Retail

Price

Remote Control Features

Warranty

0.00

0.00

Available RadioShack Service Plan

No

Warranty Labor UOM

days

Warranty Parts UOM

days

Root

Additional Features

Water-Resistant or Waterproofness Standard

No

Miscellaneous Features

Power Features

Print
 

Summary

The NTE74HC573 is a high-speed octal transparent D−type latch with 3−state outputs in a 20−Lead DIP-type package with the capability to drive 15 LS−TTL loads. When the latch−enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output−enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high−impedance state. In the high−impedance state, the outputs neither load nor drive the bus lines significantly. The high−impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high−impedance state. To ensure the high−impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current−sinking capability of the driver.
  • Wide power supply range: 2V to 6V
  • 3−state outputs directly drive bus lines
  • Balanced propagation delays and transition times
  • Bus driver outputs drive up to 15 LS−TTL loads
  • Significant power reduction compared to LS−TTL logic ICs
  • Absolute maximum ratings:
    VCC: −0.5 to +7.0V
  • IIK, IOK: ±20mA
  • DC drain current (per output), IOUT: ±35mA
  • DC output source or sink current (per output), IOUT: ±25mA
  • ICC: ±50mA
  • TJ: +150°C
  • Tstg: −65°C to +150°C
  • RthJA: 69°C/W
  • TL: +300°C

Tech Specs

The NTE74HC573 is a high-speed octal transparent D−type latch with 3−state outputs in a 20−Lead DIP-type package with the capability to drive 15 LS−TTL loads. When the latch−enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output−enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high−impedance state. In the high−impedance state, the outputs neither load nor drive the bus lines significantly. The high−impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high−impedance state. To ensure the high−impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current−sinking capability of the driver.

Reviews

$ $1.84 In Stock