• Model: NTE74HC173
  • Catalog #: 55050992

NTE74HC173 IC High-Speed CMOS Flip-Flop

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$1.70

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Additional Information

  • Summary
  • Tech Specs
  • Reviews
The NTE74HC173 is a high-speed 3−state quad D−type flip−flop in a 16−Lead DIP-type package that utilizes advanced silicon−gate CMOS technology. It possesses the low-power consumption and high-noise immunity of standard CMOS integrated circuits and can operate at speeds comparable to the equivalent low-power Schottky device. The outputs are buffered, allowing this circuit to drive 15 LS−TTL loads. The large output drive capability and the 3−state feature make this part ideally suited for interfacing with bus lines in a bus-oriented system. The four D−type flip−flops operate synchronously from a common clock. The 3−state outputs allow the device to be used in bus-organized systems. The outputs are placed in the 3−state mode when either of the two output disable pins are in the logic “1” level. The input disable allows the flip−flops to remain in their present states without having to disrupt the clock. If either of the two input disables are taken to a logic “1” level, the Q outputs are fed back to the inputs forcing the flip−flops to remain in the same state. Clearing is enabled by taking the CLEAR input to a logic “1” level. The data outputs change state on the positive going edge of the clock. The 74HC logic family is functionally as well as pin−out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by diodes to VCC and GND. Features:
Typical propagation delay: 18ns
Wide power supply range: 2V to 6V
3−state outputs
Low-input current: 1µA (max)
Low quiescent current: 80µA (max)
High output-drive current: 6mA (min)
  • Absolute maximum ratings:*
    VCC: −0.5 to +7.0V
  • VIN: −1.5 to VCC +1.5V
  • VOUT: −0.5 to VCC + 0.5V
  • IIK, IOKL ±20mA
  • Per-pin IOUT: ±35mA
  • ICC: ±70mA
  • PD: 600mW
  • Tstg: −65°C to +150°C
  • TL: +260°C
* Absolute Maximum Ratings are those values beyond which damage to the device may occur. Unless otherwise specified, all voltages are referenced to GND. Power Dissipation temperature derating: 12mW/°C from +65°C to +85°C.
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Ships in 1-2 Business Days

Presentation Attributes

Storefront Attributes

Search Refinements

Shop Runner

Battery Features

Capacity UOM

mAh

Rechargeable

No

Cleansing

Dimensions

Fulfillment

Package Height

0.50

Package Length

6.25

Package Width

3.70

General

Model

NTE74HC173

Product Type

Flip-flops

Identification

Manufacturer Part Number

NTE74HC173

Surcharge

Legal

Merchandising

Inputs & Outputs

Miscellaneous Features

Operating Temperature UOM

° F

Supported Languages

English

Power Features

Docking station

No

Promo

Retail

Price

Remote Control Features

Warranty

0.00

0.00

Available RadioShack Service Plan

No

Warranty Labor UOM

days

Warranty Parts UOM

days

Root

Additional Features

Water-Resistant or Waterproofness Standard

No

Miscellaneous Features

Power Features

Print
 

Summary

The NTE74HC173 is a high-speed 3−state quad D−type flip−flop in a 16−Lead DIP-type package that utilizes advanced silicon−gate CMOS technology. It possesses the low-power consumption and high-noise immunity of standard CMOS integrated circuits and can operate at speeds comparable to the equivalent low-power Schottky device. The outputs are buffered, allowing this circuit to drive 15 LS−TTL loads. The large output drive capability and the 3−state feature make this part ideally suited for interfacing with bus lines in a bus-oriented system. The four D−type flip−flops operate synchronously from a common clock. The 3−state outputs allow the device to be used in bus-organized systems. The outputs are placed in the 3−state mode when either of the two output disable pins are in the logic “1” level. The input disable allows the flip−flops to remain in their present states without having to disrupt the clock. If either of the two input disables are taken to a logic “1” level, the Q outputs are fed back to the inputs forcing the flip−flops to remain in the same state. Clearing is enabled by taking the CLEAR input to a logic “1” level. The data outputs change state on the positive going edge of the clock. The 74HC logic family is functionally as well as pin−out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by diodes to VCC and GND. Features:
Typical propagation delay: 18ns
Wide power supply range: 2V to 6V
3−state outputs
Low-input current: 1µA (max)
Low quiescent current: 80µA (max)
High output-drive current: 6mA (min)
  • Absolute maximum ratings:*
    VCC: −0.5 to +7.0V
  • VIN: −1.5 to VCC +1.5V
  • VOUT: −0.5 to VCC + 0.5V
  • IIK, IOKL ±20mA
  • Per-pin IOUT: ±35mA
  • ICC: ±70mA
  • PD: 600mW
  • Tstg: −65°C to +150°C
  • TL: +260°C

Tech Specs

The NTE74HC173 is a high-speed 3−state quad D−type flip−flop in a 16−Lead DIP-type package that utilizes advanced silicon−gate CMOS technology. It possesses the low-power consumption and high-noise immunity of standard CMOS integrated circuits and can operate at speeds comparable to the equivalent low-power Schottky device. The outputs are buffered, allowing this circuit to drive 15 LS−TTL loads. The large output drive capability and the 3−state feature make this part ideally suited for interfacing with bus lines in a bus-oriented system. The four D−type flip−flops operate synchronously from a common clock. The 3−state outputs allow the device to be used in bus-organized systems. The outputs are placed in the 3−state mode when either of the two output disable pins are in the logic “1” level. The input disable allows the flip−flops to remain in their present states without having to disrupt the clock. If either of the two input disables are taken to a logic “1” level, the Q outputs are fed back to the inputs forcing the flip−flops to remain in the same state. Clearing is enabled by taking the CLEAR input to a logic “1” level. The data outputs change state on the positive going edge of the clock. The 74HC logic family is functionally as well as pin−out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by diodes to VCC and GND. Features:
Typical propagation delay: 18ns
Wide power supply range: 2V to 6V
3−state outputs
Low-input current: 1µA (max)
Low quiescent current: 80µA (max)
High output-drive current: 6mA (min)

Reviews

$ $1.70 In Stock