• Model: NTE74195
  • Catalog #: 55051337

NTE74195 IC TTL 4-Bit Parallel Access Shift Register

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$2.29

In Stock

(Online Only)

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Additional Information

  • Summary
  • Tech Specs
  • Reviews
The NTE74195 is a 4−bit parallel access shift register in a 16−lead plastic DIP-type package and features parallel inputs, parallel outputs, J−K serial inputs, shift/load control input and a direct overriding clear. All inputs are buffered to lower the input drive requirements.

The register has two distinct modes of operation:
  • Parallel (Broadside) Load
  • Shift (in the direction Q A toward Q D)


  • Parallel loading is accomplished by applying the four bits of data and taking the shift/load control input low. The data is loaded into the associated flip−flop and appears at the outputs after the positive transition of the clock input. Shifting is accomplished synchronously when the shift/load control input is high. Serial data for this mode is entered at the J−K inputs. These inputs permit the first stage to perform as a J−K, D− or T−type flip−flop as shown in the function table.
    • Synchronous parallel load
    • Positive edge−triggered clock
    • Parallel inputs and outputs from each flip−flop
    • Direct overriding clear
    • J and K inputs to first stage
    • Complementary outputs from last stage
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    Shipping

    Ships in 1-2 Business Days

    Presentation Attributes

    Storefront Attributes

    Search Refinements

    Shop Runner

    Battery Features

    Capacity UOM

    mAh

    Rechargeable

    No

    Cleansing

    Dimensions

    Fulfillment

    Package Height

    0.50

    Package Length

    6.25

    Package Width

    3.70

    General

    Model

    NTE74195

    Product Type

    Registers and buffers

    Identification

    Manufacturer Part Number

    NTE74195

    Surcharge

    Legal

    Merchandising

    Inputs & Outputs

    Miscellaneous Features

    Operating Temperature UOM

    ° F

    Supported Languages

    English

    Power Features

    Docking station

    No

    Promo

    Retail

    Price

    Remote Control Features

    Warranty

    0.00

    0.00

    Available RadioShack Service Plan

    No

    Warranty Labor UOM

    days

    Warranty Parts UOM

    days

    Root

    Additional Features

    Water-Resistant or Waterproofness Standard

    No

    Miscellaneous Features

    Power Features

    Print
     

    Summary

    The NTE74195 is a 4−bit parallel access shift register in a 16−lead plastic DIP-type package and features parallel inputs, parallel outputs, J−K serial inputs, shift/load control input and a direct overriding clear. All inputs are buffered to lower the input drive requirements.

    The register has two distinct modes of operation:
  • Parallel (Broadside) Load
  • Shift (in the direction Q A toward Q D)


  • Parallel loading is accomplished by applying the four bits of data and taking the shift/load control input low. The data is loaded into the associated flip−flop and appears at the outputs after the positive transition of the clock input. Shifting is accomplished synchronously when the shift/load control input is high. Serial data for this mode is entered at the J−K inputs. These inputs permit the first stage to perform as a J−K, D− or T−type flip−flop as shown in the function table.
    • Synchronous parallel load
    • Positive edge−triggered clock
    • Parallel inputs and outputs from each flip−flop
    • Direct overriding clear
    • J and K inputs to first stage
    • Complementary outputs from last stage

    Tech Specs

    The NTE74195 is a 4−bit parallel access shift register in a 16−lead plastic DIP-type package and features parallel inputs, parallel outputs, J−K serial inputs, shift/load control input and a direct overriding clear. All inputs are buffered to lower the input drive requirements.

    The register has two distinct modes of operation:
  • Parallel (Broadside) Load
  • Shift (in the direction Q A toward Q D)


  • Parallel loading is accomplished by applying the four bits of data and taking the shift/load control input low. The data is loaded into the associated flip−flop and appears at the outputs after the positive transition of the clock input. Shifting is accomplished synchronously when the shift/load control input is high. Serial data for this mode is entered at the J−K inputs. These inputs permit the first stage to perform as a J−K, D− or T−type flip−flop as shown in the function table.

    Reviews

    $ $2.29 In Stock