• Model: NTE74110
  • Catalog #: 55051301

NTE74110 IC TTL J-K Master/Slave Flip-Flop

Details

$1.67

In Stock

(Online Only)

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Additional Information

  • Summary
  • Tech Specs
  • Reviews
The NTE74110 is a DC coupled, variable-skew, J-K flip-flop in a 14-lead plastic DIP-type package that utilizes TTL circuitry to obtain 25MHz performance typically. It is termed "variable-skew" because it allows the maximum clock skew in a system to be a direct function of the clock pulse width. The J and K inputs are enabled only during a short period (20ns maximum setup time plus 5ns maximum hold time) on the rising edge of the clock pulse. After this, inputs may be changed while the clock is at the high level without affecting the state of the master. On the threshold level of the falling edge of the clock pulse, the data stored in the master during the rising edge will be transferred to the output.
The effective allowable clock skew then is minimum propagation delay time minus hold time, plus clock pulse width. This means that the system designer can set the maximum allowable clock skew needed by varying the clock pulse width. Thus, system design is made easier and the requirements for sophisticated clock distribution systems are minimized or, in some cases, entirely eliminated. This flip-flop has an additional feature -- the synchronous input has reduced sensitivity to data change while the clock is high because the data needs to be present for only a short period of time and the system's susceptibility to noise is thereby effectively reduced.
The NTE74110 has the same functional advantages as the NTE7472 in that three-input AND logic is provided for both the J and K data functions. Preset and clear inputs, which are completely independent of the state of the clock, are also provided.

Data Sheet
  • Absolute Maximum Ratings:
  • Supply voltage, VCC: 7V
  • DC input voltage, VIN: 0°C to +70°C
  • Storage temperature range, Tstg: −65°C to +150°C
  • Unless otherwise specified, all voltages are referenced to GND
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Shipping

Ships in 1-2 Business Days

Presentation Attributes

Storefront Attributes

Search Refinements

Shop Runner

Power Reviews

Battery Features

Capacity UOM

mAh

Rechargeable

No

Cleansing

Dimensions

Fulfillment

Package Height

0.50

Package Length

6.25

Package Width

3.70

General

Model

NTE74110

Product Type

Flip-flops

Identification

Manufacturer Part Number

NTE74110

Surcharge

Legal

Merchandising

Inputs & Outputs

Miscellaneous Features

Operating Temperature UOM

° F

Supported Languages

English

Power Features

Docking station

No

Promo

Retail

Price

Remote Control Features

Warranty

0.00

0.00

Available RadioShack Service Plan

No

Warranty Labor UOM

days

Warranty Parts UOM

days

Root

Additional Features

Water-Resistant or Waterproofness Standard

No

Miscellaneous Features

Power Features

Print
 

Summary

The NTE74110 is a DC coupled, variable-skew, J-K flip-flop in a 14-lead plastic DIP-type package that utilizes TTL circuitry to obtain 25MHz performance typically. It is termed "variable-skew" because it allows the maximum clock skew in a system to be a direct function of the clock pulse width. The J and K inputs are enabled only during a short period (20ns maximum setup time plus 5ns maximum hold time) on the rising edge of the clock pulse. After this, inputs may be changed while the clock is at the high level without affecting the state of the master. On the threshold level of the falling edge of the clock pulse, the data stored in the master during the rising edge will be transferred to the output.
The effective allowable clock skew then is minimum propagation delay time minus hold time, plus clock pulse width. This means that the system designer can set the maximum allowable clock skew needed by varying the clock pulse width. Thus, system design is made easier and the requirements for sophisticated clock distribution systems are minimized or, in some cases, entirely eliminated. This flip-flop has an additional feature -- the synchronous input has reduced sensitivity to data change while the clock is high because the data needs to be present for only a short period of time and the system's susceptibility to noise is thereby effectively reduced.
The NTE74110 has the same functional advantages as the NTE7472 in that three-input AND logic is provided for both the J and K data functions. Preset and clear inputs, which are completely independent of the state of the clock, are also provided.

Data Sheet
  • Absolute Maximum Ratings:
  • Supply voltage, VCC: 7V
  • DC input voltage, VIN: 0°C to +70°C
  • Storage temperature range, Tstg: −65°C to +150°C
  • Unless otherwise specified, all voltages are referenced to GND

Tech Specs

The NTE74110 is a DC coupled, variable-skew, J-K flip-flop in a 14-lead plastic DIP-type package that utilizes TTL circuitry to obtain 25MHz performance typically. It is termed "variable-skew" because it allows the maximum clock skew in a system to be a direct function of the clock pulse width. The J and K inputs are enabled only during a short period (20ns maximum setup time plus 5ns maximum hold time) on the rising edge of the clock pulse. After this, inputs may be changed while the clock is at the high level without affecting the state of the master. On the threshold level of the falling edge of the clock pulse, the data stored in the master during the rising edge will be transferred to the output.
The effective allowable clock skew then is minimum propagation delay time minus hold time, plus clock pulse width. This means that the system designer can set the maximum allowable clock skew needed by varying the clock pulse width. Thus, system design is made easier and the requirements for sophisticated clock distribution systems are minimized or, in some cases, entirely eliminated. This flip-flop has an additional feature -- the synchronous input has reduced sensitivity to data change while the clock is high because the data needs to be present for only a short period of time and the system's susceptibility to noise is thereby effectively reduced.
The NTE74110 has the same functional advantages as the NTE7472 in that three-input AND logic is provided for both the J and K data functions. Preset and clear inputs, which are completely independent of the state of the clock, are also provided.

Data Sheet

Reviews