• Model: NTE74107
  • Catalog #: 55051298

NTE74107 IC TTL Dual J−K Positive-Edge-Triggered Flip−Flop

Details

$1.22

In Stock

(Online Only)

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Additional Information

  • Summary
  • Tech Specs
  • Reviews
The NTE74107 contains two independent positive−edge−triggered flip−flops in a 14−lead plastic DIP-type package. The J−K input is loaded into the master while the clock is high and transferred to the slave on the high−to−low clock transition. For this device the J and K inputs must be stable while the clock is high.
  • Absolute maximum ratings:
    VCC: 7V
  • VIN: 5.5V
  • TA: 0°C to +70°C
  • Tstg: −65°C to +150°C
  • Unless otherwise specified, all voltages are referenced to GND
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Shipping

Ships in 1-2 Business Days

Presentation Attributes

Storefront Attributes

Search Refinements

Shop Runner

Battery Features

Capacity UOM

mAh

Rechargeable

No

Cleansing

Dimensions

Fulfillment

Package Height

0.50

Package Length

6.25

Package Width

3.70

General

Model

NTE74107

Product Type

Flip-flops

Identification

Manufacturer Part Number

NTE74107

Surcharge

Legal

Merchandising

Inputs & Outputs

Miscellaneous Features

Operating Temperature UOM

° F

Supported Languages

English

Power Features

Docking station

No

Promo

Retail

Price

Remote Control Features

Warranty

0.00

0.00

Available RadioShack Service Plan

No

Warranty Labor UOM

days

Warranty Parts UOM

days

Root

Additional Features

Water-Resistant or Waterproofness Standard

No

Miscellaneous Features

Power Features

Print
 

Summary

The NTE74107 contains two independent positive−edge−triggered flip−flops in a 14−lead plastic DIP-type package. The J−K input is loaded into the master while the clock is high and transferred to the slave on the high−to−low clock transition. For this device the J and K inputs must be stable while the clock is high.
  • Absolute maximum ratings:
    VCC: 7V
  • VIN: 5.5V
  • TA: 0°C to +70°C
  • Tstg: −65°C to +150°C
  • Unless otherwise specified, all voltages are referenced to GND

Tech Specs

The NTE74107 contains two independent positive−edge−triggered flip−flops in a 14−lead plastic DIP-type package. The J−K input is loaded into the master while the clock is high and transferred to the slave on the high−to−low clock transition. For this device the J and K inputs must be stable while the clock is high.

Reviews